Device Usage Page (device_usage_statistics.html)

This HTML page displays the device usage statistics that will be sent to Xilinx. The file also contains predefined XML tags used to simplify processing.
 
Please verify the contents are okay to send to Xilinx!
 

 
Software Version and Target Device
Product Version: ISE:10.1.02 (WebPACK) Target Family: virtex4
OS Platform: NT Target Device: xc4vfx12
Project ID (random number) 16901.7746.1 Target Package: sf363
Registration ID 182EAG0GEMTWSWS6W0MEG1ZH3 Target Speed: -10
Date Generated 土 8 23 13:23:24 2008
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Registers=511
  • Flip-Flops=511
Comparators=14
  • 13-bit comparator equal=2
  • 2-bit comparator equal=2
  • 4-bit comparator equal=9
  • 7-bit comparator equal=1
Counters=29
  • 12-bit up counter=1
  • 2-bit down counter=3
  • 2-bit up counter=1
  • 21-bit up counter=2
  • 3-bit down counter=7
  • 3-bit up counter=1
  • 4-bit down counter=2
  • 4-bit up counter=6
  • 5-bit up counter=1
  • 6-bit up counter=3
  • 7-bit up counter=1
  • 8-bit up counter=1
Adders/Subtractors=9
  • 4-bit subtractor=6
  • 6-bit adder=1
  • 6-bit adder carry out=1
  • 6-bit subtractor=1
Multiplexers=2
  • 1-bit 4-to-1 multiplexer=1
  • 4-bit 4-to-1 multiplexer=1
MiscellaneousStatistics
  • AGG_BONDED_IO=83
  • AGG_IO=83
  • AGG_SLICE=671
  • NUM_4_INPUT_LUT=670
  • NUM_ACAL_LUT=8
  • NUM_ACAL_REG=14
  • NUM_BONDED_IOB=83
  • NUM_BUFG=5
  • NUM_BUFIO=2
  • NUM_CYMUX=84
  • NUM_DCM_ADV=2
  • NUM_DP_RAM=184
  • NUM_IDELAYCTRL=12
  • NUM_IOB_DUALFLOP=2
  • NUM_ISERDES=18
  • NUM_LUT_RT=60
  • NUM_OLOGIC=3
  • NUM_OSERDES=22
  • NUM_SHIFT=14
  • NUM_SLICEL=551
  • NUM_SLICEM=106
  • NUM_SLICE_FF=693
  • NUM_XOR=62
NetStatistics
  • NumNets_Active=1279
  • NumNets_Gnd=1
  • NumNets_Vcc=3
  • NumNodesOfType_Active_BOUNCEIN=689
  • NumNodesOfType_Active_BUFGOUT=5
  • NumNodesOfType_Active_CLKPIN=678
  • NumNodesOfType_Active_CNTRLPIN=700
  • NumNodesOfType_Active_DOUBLE=3389
  • NumNodesOfType_Active_GENERIC=19
  • NumNodesOfType_Active_GLOBAL=131
  • NumNodesOfType_Active_HLONG=30
  • NumNodesOfType_Active_HUNIHEX=446
  • NumNodesOfType_Active_INPUT=2863
  • NumNodesOfType_Active_IOBIN2OUT=27
  • NumNodesOfType_Active_IOBINPUT=210
  • NumNodesOfType_Active_IOBOUTPUT=133
  • NumNodesOfType_Active_OMUX=1257
  • NumNodesOfType_Active_OUTBOUND=1079
  • NumNodesOfType_Active_OUTPUT=1089
  • NumNodesOfType_Active_PADINPUT=92
  • NumNodesOfType_Active_PADOUTPUT=27
  • NumNodesOfType_Active_PINBOUNCE=1099
  • NumNodesOfType_Active_PINFEED=3731
  • NumNodesOfType_Active_VLONG=26
  • NumNodesOfType_Active_VUNIHEX=394
  • NumNodesOfType_Gnd_BOUNCEIN=75
  • NumNodesOfType_Gnd_CLKPIN=2
  • NumNodesOfType_Gnd_CNTRLPIN=40
  • NumNodesOfType_Gnd_HGNDOUT=46
  • NumNodesOfType_Gnd_INPUT=41
  • NumNodesOfType_Gnd_IOBINPUT=90
  • NumNodesOfType_Gnd_IOBOUTPUT=2
  • NumNodesOfType_Gnd_PADINPUT=2
  • NumNodesOfType_Gnd_PINBOUNCE=37
  • NumNodesOfType_Gnd_PINFEED=118
  • NumNodesOfType_Vcc_CLKPIN=4
  • NumNodesOfType_Vcc_CNTRLPIN=60
  • NumNodesOfType_Vcc_DOUBLE=2
  • NumNodesOfType_Vcc_HVCCOUT=27
  • NumNodesOfType_Vcc_INPUT=88
  • NumNodesOfType_Vcc_IOBINPUT=82
  • NumNodesOfType_Vcc_KVCCOUT=47
  • NumNodesOfType_Vcc_OMUX=1
  • NumNodesOfType_Vcc_OUTBOUND=2
  • NumNodesOfType_Vcc_OUTPUT=2
  • NumNodesOfType_Vcc_PINBOUNCE=23
  • NumNodesOfType_Vcc_PINFEED=211
SiteSummary
  • BUFG=5
  • BUFG_GCLK_BUFFER=5
  • BUFIO=2
  • BUFIO_BUFIO=2
  • DCM_ADV=4
  • DCM_ADV_DCM_ADV=4
  • IDELAYCTRL=12
  • IDELAYCTRL_IDELAYCTRL=12
  • IOB=83
  • IOB_INBUF=27
  • IOB_OUTBUF=74
  • IOB_PAD=83
  • ISERDES=18
  • ISERDES_ISERDES=18
  • OLOGIC=3
  • OLOGIC_O1USED=1
  • OLOGIC_OFF1=2
  • OLOGIC_OFF2=2
  • OLOGIC_OFFDDRA=2
  • OSERDES=22
  • OSERDES_OSERDES=22
  • PMV=1
  • PMV_PMV=1
  • SLICEL=565
  • SLICEL_C1VDD=4
  • SLICEL_CYMUXF=44
  • SLICEL_CYMUXG=40
  • SLICEL_F=231
  • SLICEL_F5MUX=30
  • SLICEL_FFX=293
  • SLICEL_FFY=400
  • SLICEL_G=241
  • SLICEL_GNDF=40
  • SLICEL_GNDG=40
  • SLICEL_XORF=32
  • SLICEL_XORG=30
  • SLICEM=106
  • SLICEM_F=92
  • SLICEM_G=106
  • SLICEM_WSGEN=106
 
Configuration Data
DCM_ADV_DCM_ADV
  • BGM_CONFIG_REF_SEL=[CLKIN:4]
  • BGM_DIVIDE=[16:4]
  • BGM_LDLY=[5:4]
  • BGM_MODE=[BG_SNAPSHOT:4]
  • BGM_MULTIPLY=[16:4]
  • BGM_SAMPLE_LEN=[2:4]
  • BGM_SDLY=[3:4]
  • BGM_VADJ=[5:4]
  • BGM_VLDLY=[7:4]
  • BGM_VSDLY=[0:4]
  • CLKDV_DIVIDE=[16.0:2] [2.0:2]
  • CLKFX_DIVIDE=[1:3] [3:1]
  • CLKFX_MULTIPLY=[4:3] [5:1]
  • CLKIN_DIVIDE_BY_2=[FALSE:2] [TRUE:2]
  • CLKOUT_PHASE_SHIFT=[FIXED:4]
  • CLK_FEEDBACK=[1X:4]
  • DCM_CLKDV_CLKFX_ALIGNMENT=[TRUE:4]
  • DCM_EXT_FB_EN=[FALSE:4]
  • DCM_LOCK_HIGH=[FALSE:4]
  • DCM_PERFORMANCE_MODE=[MAX_SPEED:4]
  • DCM_UNUSED_TAPS_POWERDOWN=[FALSE:2] [TRUE:2]
  • DCM_VREF_SOURCE=[VBG_DLL:4]
  • DCM_VREG_ENABLE=[FALSE:2] [TRUE:2]
  • DESKEW_ADJUST=[17:4]
  • DFS_AVE_FREQ_ADJ_INTERVAL=[3:4]
  • DFS_AVE_FREQ_GAIN=[2.0:4]
  • DFS_AVE_FREQ_SAMPLE_INTERVAL=[2:4]
  • DFS_COARSE_SEL=[LEGACY:4]
  • DFS_EARLY_LOCK=[FALSE:4]
  • DFS_EN_RELRST=[TRUE:4]
  • DFS_EXTEND_FLUSH_TIME=[FALSE:4]
  • DFS_EXTEND_HALT_TIME=[FALSE:4]
  • DFS_EXTEND_RUN_TIME=[FALSE:4]
  • DFS_FINE_SEL=[LEGACY:4]
  • DFS_FREQUENCY_MODE=[LOW:4]
  • DFS_NON_STOP=[FALSE:4]
  • DFS_OSCILLATOR_MODE=[PHASE_FREQ_LOCK:4]
  • DFS_SKIP_FINE=[FALSE:4]
  • DFS_TP_SEL=[LEVEL:4]
  • DFS_TRACKMODE=[1:4]
  • DLL_CONTROL_CLOCK_SPEED=[HALF:4]
  • DLL_CTL_SEL_CLKIN_DIV2=[FALSE:4]
  • DLL_DESKEW_LOCK_BY1=[FALSE:4]
  • DLL_FREQUENCY_MODE=[HIGH:1] [LOW:3]
  • DLL_PD_DLY_SEL=[0:4]
  • DLL_PERIOD_LOCK_BY1=[FALSE:4]
  • DLL_PHASE_DETECTOR_AUTO_RESET=[TRUE:4]
  • DLL_PHASE_DETECTOR_MODE=[ENHANCED:4]
  • DLL_PHASE_SHIFT_CALIBRATION=[AUTO_DPS:4]
  • DLL_PHASE_SHIFT_LOCK_BY1=[FALSE:4]
  • DUTY_CYCLE_CORRECTION=[TRUE:4]
  • PMCD_SYNC=[FALSE:4]
  • STARTUP_WAIT=[FALSE:4]
IOB_PAD
  • DRIVEATTRBOX=[12:29]
  • IOATTRBOX=[LVCMOS33:38] [SSTL18_II:20] [SSTL18_I:25]
  • SLEW=[SLOW:29]
ISERDES_ISERDES
  • BITSLIP_ENABLE=[FALSE:16] [TRUE:2]
  • DATA_RATE=[DDR:18]
  • DATA_WIDTH=[4:18]
  • DDR_CLK_EDGE=[SAME_EDGE_PIPELINED:18]
  • INIT_Q1=[0:18]
  • INIT_Q2=[0:18]
  • INIT_Q3=[0:18]
  • INIT_Q4=[0:18]
  • INTERFACE_TYPE=[NETWORKING:2] [MEMORY:16]
  • IOBDELAY=[BOTH:2] [IFD:16]
  • IOBDELAY_TYPE=[FIXED:18]
  • IOBDELAY_VALUE=[0:16] [17:2]
  • NUM_CE=[1:18]
  • OFB_USED=[FALSE:18]
  • SERDES=[TRUE:18]
  • SERDES_MODE=[MASTER:18]
  • SRTYPE=[ASYNC:18]
  • SRVAL_Q1=[0:18]
  • SRVAL_Q2=[0:18]
  • SRVAL_Q3=[0:18]
  • SRVAL_Q4=[0:18]
  • TFB_USED=[FALSE:18]
OLOGIC_OFF1
  • INIT_OQ=[0:2]
  • LATCH_OR_FF=[FF:2]
OSERDES_OSERDES
  • DATA_RATE_OQ=[DDR:22]
  • DATA_RATE_TQ=[DDR:22]
  • DATA_WIDTH=[4:22]
  • DDR_CLK_EDGE=[SAME_EDGE:22]
  • INIT_OQ=[0:22]
  • INIT_TQ=[1:22]
  • SERDES=[TRUE:22]
  • SERDES_MODE=[MASTER:22]
  • SRTYPE=[ASYNC:22]
  • SRVAL_OQ=[0:22]
  • SRVAL_TQ=[1:22]
  • TRISTATE_WIDTH=[4:22]
SLICEL_FFX
  • FFX_INIT_ATTR=[INIT0:283] [INIT1:10]
  • FFX_SR_ATTR=[SRLOW:283] [SRHIGH:10]
  • LATCH_OR_FF=[FF:293]
  • SYNC_ATTR=[ASYNC:90] [SYNC:203]
SLICEL_FFY
  • FFY_INIT_ATTR=[INIT0:315] [INIT1:85]
  • FFY_SR_ATTR=[SRLOW:315] [SRHIGH:85]
  • LATCH_OR_FF=[FF:400]
  • SYNC_ATTR=[ASYNC:111] [SYNC:289]
SLICEM_F
  • F_ATTR=[DUAL_PORT:92]
  • LUT_OR_MEM=[RAM:92]
SLICEM_G
  • G_ATTR=[DUAL_PORT:92] [SHIFT_REG:14]
  • LUT_OR_MEM=[RAM:106]
 
Pin Data
BUFG
  • I0=5
  • O=5
BUFG_GCLK_BUFFER
  • IN=5
  • OUT=5
BUFIO
  • I=2
  • O=2
BUFIO_BUFIO
  • I=2
  • O=2
DCM_ADV
  • CLK0=4
  • CLK2X=1
  • CLK90=1
  • CLKDV=1
  • CLKFB=4
  • CLKIN=4
  • CTLMODE=2
  • LOCKED=2
  • PSEN=4
  • PSINCDEC=2
  • RST=2
DCM_ADV_DCM_ADV
  • CLK0=4
  • CLK2X=1
  • CLK90=1
  • CLKDV=1
  • CLKFB=4
  • CLKIN=4
  • CTLMODE=2
  • LOCKED=2
  • PSEN=4
  • PSINCDEC=2
  • RST=2
IDELAYCTRL
  • REFCLK=12
  • RST=12
IDELAYCTRL_IDELAYCTRL
  • REFCLK=12
  • RST=12
IOB
  • I=27
  • O=74
  • PAD=83
  • T=20
IOB_INBUF
  • OUT=27
  • PAD=27
IOB_OUTBUF
  • IN=74
  • OUT=74
  • TRI=20
IOB_PAD
  • PAD=83
ISERDES
  • BITSLIP=18
  • CE1=18
  • CE2=18
  • CLK=18
  • CLKDIV=18
  • D=18
  • DLYCE=18
  • DLYINC=18
  • DLYRST=18
  • O=2
  • OCLK=18
  • Q1=16
  • Q2=14
  • REV=18
  • SR=18
ISERDES_ISERDES
  • BITSLIP=18
  • CE1=18
  • CE2=18
  • CLK=18
  • CLKDIV=18
  • D=18
  • DLYCE=18
  • DLYINC=18
  • DLYRST=18
  • O=2
  • OCLK=18
  • Q1=16
  • Q2=14
  • REV=18
  • SR=18
OLOGIC
  • CLK=2
  • D1=3
  • D2=2
  • OCE=2
  • OQ=3
OLOGIC_O1USED
  • 0=1
  • OUT=1
OLOGIC_OFF1
  • CE=2
  • CK=2
  • D=2
  • Q=2
OLOGIC_OFF2
  • CE=2
  • CK=2
  • D=2
  • Q=2
OLOGIC_OFFDDRA
  • OFF1=2
  • OFF2=2
  • OFFDDR=2
OSERDES
  • CLK=22
  • CLKDIV=22
  • D1=22
  • D2=22
  • D3=22
  • D4=22
  • D5=22
  • D6=22
  • OCE=22
  • OQ=22
  • REV=22
  • SR=22
  • T1=22
  • T2=22
  • T3=22
  • T4=22
  • TCE=22
  • TQ=20
OSERDES_OSERDES
  • CLK=22
  • CLKDIV=22
  • D1=22
  • D2=22
  • D3=22
  • D4=22
  • D5=22
  • D6=22
  • OCE=22
  • OQ=22
  • REV=22
  • SR=22
  • T1=22
  • T2=22
  • T3=22
  • T4=22
  • TCE=22
  • TQ=20
PMV
  • A0=1
  • A1=1
  • A2=1
  • A3=1
  • A4=1
  • A5=1
  • EN=1
  • ODIV4=1
PMV_PMV
  • A0=1
  • A1=1
  • A2=1
  • A3=1
  • A4=1
  • A5=1
  • EN=1
  • ODIV4=1
SLICEL
  • BX=222
  • BY=322
  • CE=139
  • CIN=38
  • CLK=446
  • COUT=40
  • F1=228
  • F2=191
  • F3=170
  • F4=130
  • G1=241
  • G2=208
  • G3=186
  • G4=134
  • SR=429
  • X=101
  • XB=2
  • XMUX=18
  • XQ=293
  • Y=115
  • YQ=400
SLICEL_C1VDD
  • 1=4
SLICEL_CYMUXF
  • 0=44
  • 1=44
  • OUT=44
  • S0=44
SLICEL_CYMUXG
  • 0=40
  • 1=40
  • OUT=40
  • S0=40
SLICEL_F
  • A1=228
  • A2=191
  • A3=170
  • A4=130
  • D=231
SLICEL_F5MUX
  • 0=30
  • 1=30
  • OUT=30
  • S0=30
SLICEL_FFX
  • CE=114
  • CK=293
  • D=293
  • Q=293
  • REV=11
  • SR=283
SLICEL_FFY
  • CE=133
  • CK=400
  • D=400
  • Q=400
  • REV=5
  • SR=387
SLICEL_G
  • A1=241
  • A2=208
  • A3=186
  • A4=134
  • D=241
SLICEL_GNDF
  • 0=40
SLICEL_GNDG
  • 0=40
SLICEL_XORF
  • 0=32
  • 1=32
  • O=32
SLICEL_XORG
  • 0=30
  • 1=30
  • O=30
SLICEM
  • BY=106
  • CLK=106
  • F1=92
  • F2=92
  • F3=92
  • F4=92
  • G1=106
  • G2=106
  • G3=106
  • G4=106
  • SR=106
  • X=92
  • Y=14
SLICEM_F
  • A1=92
  • A2=92
  • A3=92
  • A4=92
  • D=92
  • DI=92
  • WF1=92
  • WF2=92
  • WF3=92
  • WF4=92
  • WS=92
SLICEM_G
  • A1=106
  • A2=106
  • A3=106
  • A4=106
  • D=14
  • DI=106
  • WG1=92
  • WG2=92
  • WG3=92
  • WG4=92
  • WS=106
SLICEM_WSGEN
  • CK=106
  • WE=106
  • WSF=92
  • WSG=106
 
Tool Usage
Command Line History
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc4vfx12-sf363-10 -cm speed -pr off -k 4 -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol high -xe c -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -v 3 -s 10 -xml <design> <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
 
>
Software Quality
Run Statistics
ProgramRuns StartedRuns FinishedErrorsFatal ErrorsInternal ErrorsExceptionsCore Dumps
bitgen 53 53 0 0 0 0 0
map 78 70 0 0 0 0 0
netgen 110 110 0 0 0 0 0
ngcbuild 83 83 0 0 0 0 0
ngdbuild 78 78 0 0 0 0 0
par 72 66 5 0 0 0 0
trce 66 66 0 0 0 0 0
xst 204 202 0 0 0 0 0
 
Help Statistics
Help files
/doc/japanese/isehelp/ite_c_overview.htm ( 1 ) /doc/japanese/isehelp/pce_c_clock_to_pad_top.htm ( 1 )
/doc/japanese/isehelp/pce_c_overview.htm ( 1 ) /doc/japanese/isehelp/pce_p_clock_to_pad_create.htm ( 1 )
/doc/japanese/isehelp/pce_p_clock_to_pad_edit.htm ( 1 ) /doc/japanese/isehelp/sse_c_considerations.htm ( 1 )
/doc/japanese/isehelp/sse_c_files.htm ( 2 ) /doc/japanese/isehelp/sse_c_overview.htm ( 1 )
/doc/japanese/isehelp/sse_c_schematics.htm ( 1 ) /doc/japanese/isehelp/sse_c_symbols.htm ( 2 )
/doc/japanese/isehelp/sse_r_symbols_tab.htm ( 1 )
 
Project Statistics
PROP_Synthesis_Tool=XST (VHDL/Verilog) PROP_Simulator=Modelsim-XE Verilog
PROP_Top_Level_Module_Type=HDL PROP_PreferredLanguage=Verilog
PROP_Enable_Message_Filtering=false PROP_Enable_Incremental_Messaging=false
PROP_UseSmartGuide=false Partitions count=1
FILE_UCF=1 FILE_VERILOG=15
PROP_DevFamily=Virtex4 PROP_DevSpeed=-10
PROP_FitterReportFormat=HTML PROP_Simulator=Modelsim-XE Verilog
PROP_SynthOptEffort=High PROP_UserConstraintEditorPreference=Constraints Editor
PROP_xilxMapCoverMode=Speed PROP_xilxPAReffortLevel=High
PROP_xilxPARextraEffortLevel=Continue on Impossible Project duration(days)=0